Intel today officially announced its long awaited, next-generation server chips: the Xeon CPU Max, known to engagement as “Sapphire Rapids,” and the Data Heart GPU Max, which for more than than two years has been known – and been a focal point of scrutiny, speculation and frustration – every bit “Ponte Vecchio.”
Both chips have been delayed, the GPU in particular, and both have taken on outsized prominence in the HPC industry because they will power Intel’due south Aurora supercomputer, one the U.South.’s first three exascale-class systems now being installed at Argonne National Laboratory. Intel said in tardily September information technology had begun aircraft Aurora blades (this reporter saw installed blades at Argonne’s Leadership Computing Facility earlier this week, see below image), making Argonne one of the outset customers to be granted access to the new processors. Intel said Aurora – to be comprised of 10,000 blades, each with six Max GPUs and two Max CPUs – is expected to exceed two exaFLOPS peak double-precision performance.
In its announcement today, Intel said the Max Serial products are slated to launch in January 2023.
The Xeon Max CPU is the first x86-based chip with high bandwidth memory (HBM), which the company said accelerates many HPC workloads without the need for code changes. The Max Series GPU is Intel’s highest density processor, packing more than than 100 billion transistors into a 47-tile package with up to 128 gigabytes of high bandwidth retentiveness.
The Xeon Max CPU offers up to 56 performance cores constructed of four tiles and connected using Intel’s embedded multi-die interconnect bridge (EMIB) engineering, in a 350-watt envelope. It contains 64GB of high bandwidth in-package retention, as well equally PCI Limited 5.0 and CXL1.one I/O. Xeon Max CPUs will provide more than 1GB of high bandwidth memory (HBM) capacity per core, enough to fit most common HPC workloads, according to Intel, and upwards to 4.8x improve functioning compared to the contest on HPC workloads, the company said.
Intel said the new CPU has 68 percentage less power usage than competing product for the same HCPG performance and that AMX extensions heave AI performance and deliver 8x peak throughput over AVX-512 for INT8 with INT32 accumulation operations.
The Max Series GPUs deliver up to 128 Xe-HPC cores, which Intel called “the new foundational compages” for enervating workloads. The GPU serial features, according to Intel, 408MB of L2 cache – the highest in the industry, according to the company – and 64MB of L1 cache. Intel said it’due south only HPC/AI GPU with native ray tracing acceleration, for scientific visualization and animation.
Max Serial GPUs will exist available in several form factors:
- Max Series 1100 GPU: A 300-watt double-wide PCIe card with 56 Xe cores and 48GB of HBM2e memory. Multiple cards can be connected via Intel Xe Link bridges.
- Max Serial 1350 GPU: A 450-watt OAM module with 112 Xe cores and 96GB of HBM.
- Max Series 1550 GPU: Intel’s maximum functioning 600-watt OAM module with 128 Xe cores and 128GB of HBM.
Intel said information technology also will offering the Data Center GPU Max subsystem with x4 GPU OAM carrier board and Intel Xe Link to enable multi-GPU communication inside the subsystem.
Intel also said its 2023 oneAPI software ecosystem volition provide a single programming environment for both processors and that oneAPI combined with AI tools “volition deliver capabilities to enable the Intel Max Series products’ advanced features.”
In advance of SC22, Argonne and Intel unveiled Sunspot, Aurora’s Examination Development System consisting of 128 production blades. Researchers from the Aurora Early Science Program volition have access to the system beginning in tardily this year.
Intel said the Max Series products volition power several other HPC systems critical for national security and basic enquiry, including Crossroads at Los Alamos National Laboratory, CTS-ii systems at Lawrence Livermore National Laboratory and Sandia National Laboratory, and Camphor3 at Kyoto University.
Looking ahead, Intel said the upcoming “Rialto Span” Data Heart Max Serial GPU is intended to make it in 2024. The company added that “Intel is then planning to release the next major architecture innovation to enable the hereafter of HPC. The company’s upcoming XPU, lawmaking-named Falcon Shores, volition combine Xe and x86 cores on a unmarried package.” This new architecture will have the flexibility to integrate new IPs from Intel and customers, manufactured using Intel’s IDM 2.0 model, the company said.
“To ensure no HPC workload is left behind, we demand a solution that maximizes bandwidth, maximizes compute, maximizes developer productivity and ultimately maximizes impact,” said Jeff McVeigh, Intel corporate vice president and general manager, Super Compute Group. “The Intel Max Series product family brings loftier bandwidth retentivity to the broader market, along with oneAPI, making it easy to share code between CPUs and GPUs and solve the world’due south biggest challenges faster.”